Introduction

Overview

  • Memory Interfacing
  • Device Interfacing
    • MMIO
    • Controller Based IO

Memory Interfacing

RAM

figures/ram.png

RAM Interfacing

figures/single-ram.png

Write Transaction

figures/mem-write-req-1.png

Write Transaction

figures/mem-write-req-2.png

Read Transaction

figures/mem-read-req-1.png

Read Transaction

figures/mem-read-req-2.png

Multiple RAM Chips

  • What if we wanted 8 bytes of RAM?
  • And we have only 4 byte RAM chips

Address for RAM1 and RAM2

  • RAM1: 00 - 03
  • RAM2: 10 - 13

Multiple RAM Chips

figures/two-ram-1.png

Multiple RAM Chips

figures/two-ram-2.png

Multiple RAM Chips

figures/two-ram-3.png

Multiple RAM Chips

figures/two-ram-4.png

Memory Map

figures/memory-map.png

System Bus

figures/system-bus.png

Device Interfacing

Seven Segment Display

figures/7-segment.png

Seven Segment Display

figures/7-segment-data.png

Replace RAM with Display

figures/two-ram.png

Replace RAM with Display

figures/ram-display.png

Memory Mapped IO

figures/ram-display.png

Accessing Device from a C Program

unsigned char *p;

p = 0x10;   /* point it to device register */
*p = 5;   /* write to the device register */

Memory Map

figures/memory-map-display.png

Example: Display Controller

figures/display-controller.png

Each pixel on the screen is controlled by 3 memory locations, corresponding to R, G and B.

Example: Serial Controller

figures/serial-controller.png
  • Data written to the TX register, is transmitted out
  • Data received, is available from the RX register
  • Data rate, and other comm. parameters can be specified through the CTL register

But how does the USB mouse / keyboard talk to the CPU?

Controller Based IO

figures/io-controller.png

Why?

  • I2C and SPI Bus
    • Reduces no. of pins on the chip
    • Saves board space, since only fewer lines are required
  • USB Bus
    • Serial interface reduces no. of wires
    • Decreases the thicknes of cable, improves flexibility
    • Simplified connector

ARM SoC

figures/arm-soc.png
  • To access a device that is not memory mapped, the corresponding controller is required
  • System-on-Chips have many controllers on a single chip, to interface with various kinds of devices

MMIO Example

SRC Registers

Address Name Description

0x4006_E000

SCR

SRC Control Register

0x4006_E004

SBMR1

SRC Boot Mode Register 1

0x4006_E008

SRSR

SRC Status Register

Try Out

  • Viewing the SCR register, from U-Boot prompt 
    U-Boot> md 0x4006E000 1
  • Setting bit 12 of SCR register 
    U-Boot> mw 0x4006E000 0x1000

Conclusion

  • Served to refresh microprocessor and device interfacing fundamentals
  • Explored the hardware setup
  • Re-inforced the idea of memory mapped IO with example